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IEC 62530-2:2021

SystemVerilog - Part 2: Universal Verification Methodology Language Reference Manual

Standard Details

IEC 62530-2:2021(E) establishes the Universal Verification Methodology (UVM), a set of application programming
interfaces (APIs) that defines a base class library (BCL) definition used to develop modular, scalable, and reusable components for functional verification environments. The APIs and BCL are based on the IEEE standard for SystemVerilog, IEEE Std 1800™. This publication has the status of a double logo IEC/IEEE standard.

General Information

Status : WITHDRAWN
Standard Type: Main
Document No: IEC 62530-2:2021
Document Year: 2021
Pages: 471
Edition: 1.0
  • Section Volume:
  • TC 91 Electronics assembly technology
  • ICS:
  • 25.040.01 Industrial automation systems in general
  • 35.060 Languages used in information technology

Life Cycle

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WITHDRAWN
IEC 62530-2:2021
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